main Project Status (06/13/2010 - 19:40:51)
Project File: main.ise Current State: Translated
Module Name: ps2_rxtx
  • Errors:
No Errors
Target Device: xc3s400-4tq144
  • Warnings:
2 Warnings
Product Version: ISE 10.1.03 - WebPACK
  • Routing Results:
 
Design Goal: Balanced
  • Timing Constraints:
 
Design Strategy: Xilinx Default (unlocked)
  • Final Timing Score:
  
 
main Partition Summary [-]
No partition information was found.
 
Device Utilization Summary (estimated values) [-]
Logic UtilizationUsedAvailableUtilization
Number of Slices 104 3584 2%
Number of Slice Flip Flops 57 7168 0%
Number of 4 input LUTs 202 7168 2%
Number of bonded IOBs 23 97 23%
Number of GCLKs 1 8 12%
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentSo 13. Jun 19:40:47 201002 Warnings8 Infos
Translation ReportCurrentSo 13. Jun 19:40:51 2010000
Map Report     
Place and Route Report     
Static Timing Report     
Bitgen Report     

Date Generated: 06/13/2010 - 19:40:51