| main Project Status (06/13/2010 - 19:40:51) | |||
| Project File: | main.ise | Current State: | Translated |
| Module Name: | ps2_rxtx |
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No Errors |
| Target Device: | xc3s400-4tq144 |
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2 Warnings |
| Product Version: | ISE 10.1.03 - WebPACK |
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| Design Goal: | Balanced |
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| Design Strategy: | Xilinx Default (unlocked) |
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| main Partition Summary | [-] | |||
| No partition information was found. | ||||
| Device Utilization Summary (estimated values) | [-] | |||
| Logic Utilization | Used | Available | Utilization | |
| Number of Slices | 104 | 3584 | 2% | |
| Number of Slice Flip Flops | 57 | 7168 | 0% | |
| Number of 4 input LUTs | 202 | 7168 | 2% | |
| Number of bonded IOBs | 23 | 97 | 23% | |
| Number of GCLKs | 1 | 8 | 12% | |
| Detailed Reports | [-] | |||||
| Report Name | Status | Generated | Errors | Warnings | Infos | |
| Synthesis Report | Current | So 13. Jun 19:40:47 2010 | 0 | 2 Warnings | 8 Infos | |
| Translation Report | Current | So 13. Jun 19:40:51 2010 | 0 | 0 | 0 | |
| Map Report | ||||||
| Place and Route Report | ||||||
| Static Timing Report | ||||||
| Bitgen Report | ||||||