<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<generated_project xmlns="http://www.xilinx.com/XMLSchema" xmlns:xil_pn="http://www.xilinx.com/XMLSchema">

  <!--                                                          -->

  <!--             For tool use only. Do not edit.              -->

  <!--                                                          -->

  <!-- ProjectNavigator created generated project file.         -->

  <!-- For use in tracking generated file and other information -->

  <!-- allowing preservation of process status.                 -->

  <!--                                                          -->

  <!-- Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved. -->

  <version xmlns="http://www.xilinx.com/XMLSchema">11.1</version>

  <sourceproject xmlns="http://www.xilinx.com/XMLSchema" xil_pn:fileType="FILE_XISE" xil_pn:name="Main.xise"/>

  <files xmlns="http://www.xilinx.com/XMLSchema">
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_LSO" xil_pn:name=".lso"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_VHDL" xil_pn:name="CTLAB_SPI.vhf"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGDBUILD_LOG" xil_pn:name="RasterScan.bld"/>
    <file xil_pn:fileType="FILE_CMD_LOG" xil_pn:name="RasterScan.cmd_log"/>
    <file xil_pn:fileType="FILE_JHD" xil_pn:name="RasterScan.jhd"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_LSO" xil_pn:name="RasterScan.lso"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NCD" xil_pn:name="RasterScan.ncd" xil_pn:subbranch="Par"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGC" xil_pn:name="RasterScan.ngc"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGD" xil_pn:name="RasterScan.ngd"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGR" xil_pn:name="RasterScan.ngr"/>
    <file xil_pn:fileType="FILE_PAD_MISC" xil_pn:name="RasterScan.pad"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAR_REPORT" xil_pn:name="RasterScan.par" xil_pn:subbranch="Par"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PCF" xil_pn:name="RasterScan.pcf" xil_pn:subbranch="Map"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="RasterScan.prj"/>
    <file xil_pn:fileType="FILE_TRCE_MISC" xil_pn:name="RasterScan.ptwx"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_STX" xil_pn:name="RasterScan.stx"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_REPORT" xil_pn:name="RasterScan.syr"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_TIMING_TXT_REPORT" xil_pn:name="RasterScan.twr" xil_pn:subbranch="Par"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_TIMING_XML_REPORT" xil_pn:name="RasterScan.twx" xil_pn:subbranch="Par"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_UNROUTES" xil_pn:name="RasterScan.unroutes" xil_pn:subbranch="Par"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BITGEN_REPORT" xil_pn:name="RasterScan.ut" xil_pn:subbranch="FPGAConfiguration"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_VHDL" xil_pn:name="RasterScan.vhf"/>
    <file xil_pn:fileType="FILE_XPI" xil_pn:name="RasterScan.xpi"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST" xil_pn:name="RasterScan.xst"/>
    <file xil_pn:fileType="FILE_HTML" xil_pn:name="RasterScan_envsettings.html"/>
    <file xil_pn:fileType="FILE_NCD" xil_pn:name="RasterScan_guide.ncd" xil_pn:origination="imported"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_MAP_REPORT" xil_pn:name="RasterScan_map.map" xil_pn:subbranch="Map"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_MAP_REPORT" xil_pn:name="RasterScan_map.mrp" xil_pn:subbranch="Map"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NCD" xil_pn:name="RasterScan_map.ncd" xil_pn:subbranch="Map"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGM" xil_pn:name="RasterScan_map.ngm" xil_pn:subbranch="Map"/>
    <file xil_pn:fileType="FILE_XRPT" xil_pn:name="RasterScan_map.xrpt"/>
    <file xil_pn:fileType="FILE_XRPT" xil_pn:name="RasterScan_ngdbuild.xrpt"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAD_EXCEL_REPORT" xil_pn:name="RasterScan_pad.csv" xil_pn:subbranch="Par"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAD_TXT_REPORT" xil_pn:name="RasterScan_pad.txt" xil_pn:subbranch="Par"/>
    <file xil_pn:fileType="FILE_XRPT" xil_pn:name="RasterScan_par.xrpt"/>
    <file xil_pn:fileType="FILE_HTML" xil_pn:name="RasterScan_summary.html"/>
    <file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="RasterScan_summary.xml"/>
    <file xil_pn:fileType="FILE_WEBTALK" xil_pn:name="RasterScan_usage.xml"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="RasterScan_vhdl.prj"/>
    <file xil_pn:fileType="FILE_XRPT" xil_pn:name="RasterScan_xst.xrpt"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_VHDL" xil_pn:name="SPI32_IN.vhf"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_VHDL" xil_pn:name="SPI32_OUT.vhf"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_VHDL" xil_pn:name="SPI8REG_IN.vhf"/>
    <file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="_ngo"/>
    <file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/bitgen.xmsgs"/>
    <file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/map.xmsgs"/>
    <file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
    <file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/par.xmsgs"/>
    <file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/trce.xmsgs"/>
    <file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/xst.xmsgs"/>
    <file xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="raster_count.prj"/>
    <file xil_pn:fileType="FILE_XST_STX" xil_pn:name="raster_count.stx"/>
    <file xil_pn:fileType="FILE_SYMBOL" xil_pn:name="raster_count.sym" xil_pn:origination="imported"/>
    <file xil_pn:fileType="FILE_XST" xil_pn:name="raster_count.xst"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BITGEN_REPORT" xil_pn:name="rasterscan.bgn" xil_pn:subbranch="FPGAConfiguration"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BIT" xil_pn:name="rasterscan.bit" xil_pn:subbranch="FPGAConfiguration"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BITGEN_DRC" xil_pn:name="rasterscan.drc" xil_pn:subbranch="FPGAConfiguration"/>
    <file xil_pn:fileType="FILE_SYMBOL" xil_pn:name="sel_zmod.sym" xil_pn:origination="imported"/>
    <file xil_pn:fileType="FILE_HTML" xil_pn:name="usage_statistics_webtalk.html"/>
    <file xil_pn:fileType="FILE_LOG" xil_pn:name="webtalk.log"/>
    <file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="webtalk_pn.xml"/>
    <file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="xlnx_auto_0_xdb"/>
    <file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="xst"/>
  </files>

  <transforms xmlns="http://www.xilinx.com/XMLSchema">
    <transform xil_pn:end_ts="1461755116" xil_pn:in_ck="166329903045550346" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-8616821847247419372" xil_pn:start_ts="1461755100">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="WarningsGenerated"/>
      <status xil_pn:value="ReadyToRun"/>
      <outfile xil_pn:name="CTLAB_SPI.vhf"/>
      <outfile xil_pn:name="RasterScan.vhf"/>
      <outfile xil_pn:name="SPI32_IN.vhf"/>
      <outfile xil_pn:name="SPI32_OUT.vhf"/>
      <outfile xil_pn:name="SPI8REG_IN.vhf"/>
    </transform>
    <transform xil_pn:end_ts="1461755116" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="-1707665410258178532" xil_pn:start_ts="1461755116">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
    </transform>
    <transform xil_pn:end_ts="1461755116" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1461755116">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
    </transform>
    <transform xil_pn:end_ts="1461755116" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="-894014969957338532" xil_pn:start_ts="1461755116">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
    </transform>
    <transform xil_pn:end_ts="1461755116" xil_pn:name="TRAN_SubProjectPreToStructuralProxy" xil_pn:prop_ck="-6388418249790646593" xil_pn:start_ts="1461755116">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
    </transform>
    <transform xil_pn:end_ts="1461755116" xil_pn:name="TRAN_platgen" xil_pn:prop_ck="9073906667052406630" xil_pn:start_ts="1461755116">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
    </transform>
    <transform xil_pn:end_ts="1461759084" xil_pn:in_ck="794786583331383403" xil_pn:name="TRANEXT_xstsynthesize_spartan3" xil_pn:prop_ck="4204384053929755519" xil_pn:start_ts="1461759066">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="WarningsGenerated"/>
      <status xil_pn:value="ReadyToRun"/>
      <status xil_pn:value="OutOfDateForOutputs"/>
      <status xil_pn:value="OutputChanged"/>
      <outfile xil_pn:name=".lso"/>
      <outfile xil_pn:name="RasterScan.jhd"/>
      <outfile xil_pn:name="RasterScan.lso"/>
      <outfile xil_pn:name="RasterScan.ngc"/>
      <outfile xil_pn:name="RasterScan.ngr"/>
      <outfile xil_pn:name="RasterScan.prj"/>
      <outfile xil_pn:name="RasterScan.stx"/>
      <outfile xil_pn:name="RasterScan.syr"/>
      <outfile xil_pn:name="RasterScan.xst"/>
      <outfile xil_pn:name="RasterScan_vhdl.prj"/>
      <outfile xil_pn:name="RasterScan_xst.xrpt"/>
      <outfile xil_pn:name="_xmsgs/xst.xmsgs"/>
      <outfile xil_pn:name="webtalk_pn.xml"/>
      <outfile xil_pn:name="xst"/>
    </transform>
    <transform xil_pn:end_ts="1461755121" xil_pn:in_ck="-1064711442296966846" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="8766392731140349688" xil_pn:start_ts="1461755121">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
    </transform>
    <transform xil_pn:end_ts="1461759130" xil_pn:in_ck="7788283764938009022" xil_pn:name="TRANEXT_ngdbuild_FPGA" xil_pn:prop_ck="4594332593051934148" xil_pn:start_ts="1461759120">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
      <outfile xil_pn:name="RasterScan.bld"/>
      <outfile xil_pn:name="RasterScan.ngd"/>
      <outfile xil_pn:name="RasterScan_ngdbuild.xrpt"/>
      <outfile xil_pn:name="_ngo"/>
      <outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
    </transform>
    <transform xil_pn:end_ts="1461759138" xil_pn:in_ck="861335626832589919" xil_pn:name="TRANEXT_map_spartan3" xil_pn:prop_ck="5157644679949784513" xil_pn:start_ts="1461759130">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="WarningsGenerated"/>
      <status xil_pn:value="ReadyToRun"/>
      <status xil_pn:value="OutOfDateForOutputs"/>
      <status xil_pn:value="OutputChanged"/>
      <outfile xil_pn:name="RasterScan.pcf"/>
      <outfile xil_pn:name="RasterScan_map.map"/>
      <outfile xil_pn:name="RasterScan_map.mrp"/>
      <outfile xil_pn:name="RasterScan_map.ncd"/>
      <outfile xil_pn:name="RasterScan_map.ngm"/>
      <outfile xil_pn:name="RasterScan_map.xrpt"/>
      <outfile xil_pn:name="RasterScan_summary.xml"/>
      <outfile xil_pn:name="RasterScan_usage.xml"/>
      <outfile xil_pn:name="_xmsgs/map.xmsgs"/>
    </transform>
    <transform xil_pn:end_ts="1461759154" xil_pn:in_ck="-8711676818463886440" xil_pn:name="TRANEXT_par_spartan3" xil_pn:prop_ck="-5298528756167062855" xil_pn:start_ts="1461759138">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="WarningsGenerated"/>
      <status xil_pn:value="ReadyToRun"/>
      <outfile xil_pn:name="RasterScan.ncd"/>
      <outfile xil_pn:name="RasterScan.pad"/>
      <outfile xil_pn:name="RasterScan.par"/>
      <outfile xil_pn:name="RasterScan.ptwx"/>
      <outfile xil_pn:name="RasterScan.unroutes"/>
      <outfile xil_pn:name="RasterScan.xpi"/>
      <outfile xil_pn:name="RasterScan_pad.csv"/>
      <outfile xil_pn:name="RasterScan_pad.txt"/>
      <outfile xil_pn:name="RasterScan_par.xrpt"/>
      <outfile xil_pn:name="_xmsgs/par.xmsgs"/>
    </transform>
    <transform xil_pn:end_ts="1461759173" xil_pn:in_ck="-4383827338018471303" xil_pn:name="TRANEXT_bitFile_spartan3" xil_pn:prop_ck="-2672950586390118423" xil_pn:start_ts="1461759158">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
      <outfile xil_pn:name="RasterScan.ut"/>
      <outfile xil_pn:name="_xmsgs/bitgen.xmsgs"/>
      <outfile xil_pn:name="rasterscan.bgn"/>
      <outfile xil_pn:name="rasterscan.bit"/>
      <outfile xil_pn:name="rasterscan.drc"/>
      <outfile xil_pn:name="usage_statistics_webtalk.html"/>
      <outfile xil_pn:name="webtalk.log"/>
      <outfile xil_pn:name="webtalk_pn.xml"/>
    </transform>
    <transform xil_pn:end_ts="1461759154" xil_pn:in_ck="-7118713828729669285" xil_pn:name="TRAN_postRouteTrce" xil_pn:prop_ck="445577401284416186" xil_pn:start_ts="1461759150">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
      <outfile xil_pn:name="RasterScan.twr"/>
      <outfile xil_pn:name="RasterScan.twx"/>
      <outfile xil_pn:name="_xmsgs/trce.xmsgs"/>
    </transform>
  </transforms>

</generated_project>
